Memory is one type of integrated circuitry, and is used in systems for storing data. Memory is usually fabricated in one or more arrays of individual memory cells. The memory cells are configured to retain or store information in at least two different selectable states. In a binary system, the states are considered as either a “0” or a “1”. In other systems, at least some individual memory cells may be configured to store more than two levels or states of information.
Integrated circuit fabrication continues to strive to produce smaller and denser integrated circuits. Accordingly, there has been substantial interest in memory cells that can be utilized in structures having programmable material between a pair of electrodes; where the programmable material has two or more selectable resistive states to enable storing of information. Examples of such memory cells are resistive RAM (RRAM) cells, phase change RAM (PCRAM) cells, and programmable metallization cells (PMCs)—which may be alternatively referred to as a conductive bridging RAM (CBRAM) cells, nanobridge memory cells, or electrolyte memory cells. The memory cell types are not mutually exclusive. For example, RRAM may be considered to encompass PCRAM and PMCs.
An example prior art memory cell 5 is shown in FIG. 1 as transitioning between two memory states. One of the memory states is a high resistance state (HRS) and the other is a low resistance state (LRS). The memory cell comprises a data storage region 7 between a pair of conductive structures 1 and 3. The data storage region may comprise any of the programmable materials described above.
The memory cell is reversibly transitioned between HRS and LRS through formation of a transitory structure 9 within the memory cell. The transitory structure may be a filament, conductive bridge, or any other suitable structure which reduces resistance through the memory cell. A portion of the conductive filament is shown to be present in the HRS, but in other applications there may be little or no portion of the conductive filament present in the HRS. Although the transitory structure is shown as a single straight line, persons of ordinary skill in the art will recognize that the transitory structure may have numerous configurations depending on the nature of the memory cell, and the chemistry and physics involved in formation of the transitory structure. For instance, the transitory structure may form through dendritic growth, and thus may comprise one or more multi-branching paths. As another example, the transitory structure may comprise a region of changed phase, altered vacancy concentration, altered ion concentration (for instance, altered oxygen ion concentration), etc.; which may or may not be part of a filament. If the transitory structure comprises a filament, such filament may be continuous in some memory cells, and may have discontinuities in other memory cells.
The building blocks of the transitory structure may be atoms, ions, clusters, vacancies, etc., depending on the chemistry of the data storage region of the memory cell. The transitory structure may directly physically contact the conductive structures on opposing sides of the transitory structure. Alternatively, the transitory structure may be spaced from at least one of the conductive structures by a small gap, with such gap being narrow enough that charge “tunnels” the gap during current flow through the memory cell.
The memory cell 5 may be programmed by providing appropriate voltage across the memory cell to either create the transitory structure 9, or to remove such transitory structure. The memory cell may be read by providing suitable voltage across memory cell to determine a resistance through the memory cell, while limiting the voltage to a level which does not cause programming of the memory cell.
Programmable memory cells of the type described in FIG. 1 may be scalable, and thus suitable for utilization in future generations of memory. However, problems are encountered in attempting to utilize such memory cells. For instance, some conventional memory cells are “leaky” in the memory states. FIG. 2 schematically depicts the LRS state of memory cell 5 as comprising a resistor 10 between the conductive structures 1 and 3. Such resistor represents the resistance through the memory cell when the transitory structure 9 (FIG. 1) is present. The resistance can be quite low, and the memory cell may be quite leaky. Accordingly, the memory cell 5 may be paired with a select device 12, as shown in FIG. 3, in order to better control current flow to and from the memory cell. The select device may be any of numerous devices, including, for example, a diode, a switch, a transistor, etc.
It is desired to develop improved memory cells, and improved methods of forming such memory cells.